Effective January 1st 2022, ICE Enterprises will increase all product prices by 20%. Market forces, both rising component cost and increasing material lead time, are requiring the first price adjustment in company history. This price increase will allow ICE Enterprises to continue to design and manufacture quality electronic hardware as has been the case for over two decades. ICE Enterprises will honor all current price quotes and accept orders at existing pricing through the end of December 2021.
The digital I/O module sites can be configured for four types of electrical interfaces:
- (S) 16-bit single-ended LVTTL
- (D) 16-bit LVDS
- (H) bidirectional 8-bit LVDS
- (R) 4-lane, bidirectional RocketIO
The connector accepts a ribbon cable connector or one of the 2×2.6in form factor modules listed below. The module sites use FPGAs to perform optional clock and MSB inversion, muxing/demuxing of data bits, packet parsing, and time code processing. The standard FPGA program supports 1-, 4-, 8-, or 16-bit data words, real or complex. If an ICE-A2D or ICE-D2E is connected, the FPGA can also be used to generate a sampling clock if not supplied externally. Dual-module sites are clocked independently to allow for short- or long-term clock skew or different sampling rates. They may also be locked to either one of the sources.
Note: SFP Transceivers are available from ICE for applicable I/O modules.