Difference between revisions of "ICE-uPAC"
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<div class="description">Multi-Interface USB-C/PCIe/10GbE with FPGA Processor</div> | <div class="description">Multi-Interface USB-C/PCIe/10GbE with FPGA Processor</div> | ||
− | + | [[File:Ice-upac-iface-side.png|thumb|360px|ICE-μPAC (Interface Side)]] | |
− | + | [[File:Ice-upac-pwr-side.png|thumb|360px|ICE-μPAC (Power Side)]] | |
+ | The ICE-μPAC (MicroPAC) is designed for low '''S'''ize, '''W'''eight, '''a'''nd '''P'''ower (SWaP) with high performance interfaces for accessing USB-C, PCIe (QSFP+), and 4x10GbE (QSFP+) connections. Running on a 12 volt supply with direct access to an FPGA for data inspection and data content control. | ||
== Features == | == Features == | ||
− | * Use the ICE- | + | * Use the ICE-μPAC to easily add a powerful FPGA Gate Array to your application |
* I/O from fixed interfaces | * I/O from fixed interfaces | ||
* Direct to Host PCIe Gen 3 4-Lane Via ICE-HBA PCIe over optics QSFP+ | * Direct to Host PCIe Gen 3 4-Lane Via ICE-HBA PCIe over optics QSFP+ | ||
− | * | + | * 4x10G Network Via QSFP+ |
* USB-C (Power Echoed from inbound Host Port) | * USB-C (Power Echoed from inbound Host Port) | ||
* Up to USB 3.1 Gen2 10 Gbps | * Up to USB 3.1 Gen2 10 Gbps | ||
Line 17: | Line 18: | ||
* Solid-state operating system drive | * Solid-state operating system drive | ||
* Small Design: Dimensions 8.25” x 3.5” x 1.0” | * Small Design: Dimensions 8.25” x 3.5” x 1.0” | ||
+ | |||
+ | == Applications == | ||
+ | |||
+ | * Network-to-Network processing (packet ingest → filter → analyze → modify → broadcast) | ||
+ | * Cyber Security Interfaces | ||
+ | * USB-C Interface Analysis | ||
== Datasheet == | == Datasheet == | ||
− | [[File:Pdf_icon_22x22.png|20px|link=https://downloads.ice-online. | + | <ul style="list-style: none; margin-left: 0;"> |
+ | <li>[[File:Pdf_icon_22x22.png|middle|20px|link=https://downloads.ice-online.com/datasheets/ICE-uPAC-Data-Sheet_20200430-with_history.pdf]] [https://downloads.ice-online.com/datasheets/ICE-uPAC-Data-Sheet_20200430-with_history.pdf ICE-uPAC-Data-Sheet_20200430-with_history.pdf]</li> | ||
+ | </ul> | ||
== Status == | == Status == | ||
{{Status|prod}} | {{Status|prod}} | ||
− | [[Category:Devices| | + | [[Category:Devices|21]] |
{{footer}} | {{footer}} |
Latest revision as of 15:49, 9 May 2020
Multi-Interface USB-C/PCIe/10GbE with FPGA Processor
The ICE-μPAC (MicroPAC) is designed for low Size, Weight, and Power (SWaP) with high performance interfaces for accessing USB-C, PCIe (QSFP+), and 4x10GbE (QSFP+) connections. Running on a 12 volt supply with direct access to an FPGA for data inspection and data content control.
Contents
Features
- Use the ICE-μPAC to easily add a powerful FPGA Gate Array to your application
- I/O from fixed interfaces
- Direct to Host PCIe Gen 3 4-Lane Via ICE-HBA PCIe over optics QSFP+
- 4x10G Network Via QSFP+
- USB-C (Power Echoed from inbound Host Port)
- Up to USB 3.1 Gen2 10 Gbps
- Thunderbolt 2 Dual 10 Gbps
- Machined 6061 Aircraft Grade Aluminum
- Low Power, 12 Volt, 5W-20W typical operation
- Data flow rates up to 3.2 GBytes/sec via PCIe interface up to 4GBytes/sec VIA Network
- Solid-state operating system drive
- Small Design: Dimensions 8.25” x 3.5” x 1.0”
Applications
- Network-to-Network processing (packet ingest → filter → analyze → modify → broadcast)
- Cyber Security Interfaces
- USB-C Interface Analysis
Datasheet
Status
This model is in production. For pricing, please see the Pricing page.