https://wiki.ice-online.com/index.php?action=history&feed=atom&title=ICE-DR2D-r5 2026-05-14T02:07:39Z Revision history for this page on the wiki MediaWiki 1.34.1 https://wiki.ice-online.com/index.php?title=ICE-DR2D-r5&diff=69&oldid=prev 2018-05-22T15:49:34Z

<p>Created page with &quot;<a href="/File:DR2D-r5-top.jpg" title="File:DR2D-r5-top.jpg">thumb|DR2D-r5 Top</a> <a href="/File:DR2D-r5-bottom.jpg" title="File:DR2D-r5-bottom.jpg">thumb|DR2D-r5 Bottom</a> &lt;div class=&quot;description&quot;&gt;Differential Receiver Input Module&lt;/div&gt; {{eolnotice|none}...&quot;</p> <p><b>New page</b></p><div>[[File:DR2D-r5-top.jpg|thumb|DR2D-r5 Top]]<br /> [[File:DR2D-r5-bottom.jpg|thumb|DR2D-r5 Bottom]]<br /> &lt;div class=&quot;description&quot;&gt;Differential Receiver Input Module&lt;/div&gt;<br /> {{eolnotice|none}}<br /> <br /> == Features ==<br /> * For use with the [[ICE-PIC5XL]] or [[ICE-PIC|later series DSP cards]]<br /> * 16 differential data lines and one differential clock line<br /> * -4V to 5V common-mode input voltage range<br /> * For use with most differential signals: PECL, ECL, LVPECL, LVECL, LVDS, LVTTL, etc.<br /> * Accepts SDR clock rates up to 100MHz<br /> * Special ICE mode allows for DDR operation (clocking on rising and falling clock edges)<br /> <br /> == Status ==<br /> {{Status|eol}}<br /> <br /> [[Category:Digital_modules]]<br /> [[Category:EOL]]<br /> {{footer}}</div>

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